An Efficient Successive Elimination Algorithm for Block-Matching Motion Estimation

Low power VLSI video compression processors are in high demand for the emerging wireless video applications [1]. Video compression processors include VLSI implementation of a motion estimation algorithm. Many motion estimation algorithms are found in the literature. Some of them are fast but can not guarantee an optimal solution; they can be stuck in a local optima. Such algorithms are fast, consumes less power when implemented in VLS, but they can result in high levels of distortion that cannot be accepted in many applications [1], [2], and [3]. On the other hand full search block matching algorithm (FSBM) is computationally intensive and a VLSI implementation of such algorithm has high power consumption [1], [4]. This paper presents an exhaustive search algorithm for block matching motion estimation. The proposed algorithm reduces the computational load with successive elimination of noncandidate blocks in the search window. Our proposed algorithm assigns each pixel to a category depending on its value. The number of categories is predetermined. The algorithm consists of number of stages, the first of which has the fewer categories, eliminating those search points that are the farthest from the match. The last stage is the FSBM but with fewer search points. This computational reduction leads to low-power VLSI implementation of the algorithm. Also, it leads to faster efficient motion estimation procedure. The correctness of this algorithm and its complexity are proved. ACKNOWLEDGMENTThe authors would like to acknowledge that this work was supported by US Departmentof Energy (DOE), EETAPP program REFERENCES[1] Viet L. Do and Kenneth Y. Yun " A Low-Power VLSI Architecture for Full-Search Block-Matching Motion Estimation," IEEE Trans. On Circuits and Systemfor Video Tech. Vol. 8, No. 4, pp. 393-398, Aug. 1998.[2] R. Li, B. Zeng, and M. L. Liou, "A New Three-step Search Algorithm for BlockMotion Estimation," IEEE Trans. Circuits Syst. Video Technol., vol. 4, pp. 438-442, Aug. 1994.[3] Wael M. Badawy, Guoqing Zhang and Magdy A. Bayoumi, "VLSI Architecture for Hierarchical Mesh-Based Motion Estimation", 1999 IEEE Workshop on SignalProcessing Systems (SIPS), Taipei, Taiwan, Oct. 20-22, 1999 [4] A. Tyagi and M. A. Bayoumi” Image Segmentation on a 2D Array by a Directed Split and Merge Procedure,” IEEE Trans. on Signal Processing, vol. 40, pp.2804-2813, May. 1992.